Description:
Springer, 2000. Hardcover. Very Good. Disclaimer:A copy that has been read, but remains in excellent condition. Pages are intact and are not marred by notes or highlighting, but may contain a neat previous owner name. The spine remains undamaged. At ThriftBooks, our motto is: Read More, Spend Less.Dust jacket quality is not guaranteed.
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System-On-A-Chip Verification: Methodology and Techniques Hardcover - 2000 - 2001st Edition
by Prakash Rashinkar; Peter Paterson; Leena Singh
First line
Silicon technology foundries continue to aggressively shrink the physical dimensions of silicon structures that can be realized on an IC.
Details
- Title System-On-A-Chip Verification: Methodology and Techniques
- Author Prakash Rashinkar; Peter Paterson; Leena Singh
- Binding Hardcover
- Edition number 2001st
- Edition 2001
- Pages 372
- Volumes 1
- Language ENG
- Publisher Springer, Boston
- Date 2000-12-31
- Illustrated Yes
- Features Bibliography, Glossary, Illustrated, Index
- ISBN 9780792372790 / 0792372794
- Weight 1.7 lbs (0.77 kg)
- Dimensions 9.62 x 6.5 x 1.07 in (24.43 x 16.51 x 2.72 cm)
- Library of Congress subjects System design, Computer software - Development
- Library of Congress Catalog Number 00052567
- Dewey Decimal Code 621.395
Media reviews
Citations
- Scitech Book News, 06/01/2001, Page 37
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System-on-a-Chip Verification: Methodology and Techniques
by Rashinkar, Prakash; Paterson, Peter; Singh, Leena
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System-on-a-Chip Verification - Methodology and Techniques
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